【代徵】APR 工程師 數位獵人科技股份有限公司
職缺描述
1. Engage in physical design tasks.
2. Including floorplanning, power grid design, physical synthesis, clock tree synthesis, routing, and DRC/LVS leading to tapeout.
職缺需求
1. Proficient with EDA tools such as Synopsys ICC2 or FC, PrimeTime, Cadence Innovus, and Tempus.
2. Capable of executing the netlist-to-GDSII design flow, covering floorplanning, power grid development, clock tree synthesis, place and route, and physical verification.
3. Skilled in hierarchical implementation, low-power design methodologies, timing closure, IR drop analysis, and crosstalk analysis.
4. Experienced with scripting languages like TCL, Perl, and Python for design automation.
5. Experience in 55nm/40nm design is essential; familiarity with 28nm/16nm or smaller nodes is a plus.
6. Expertise in FinFet design is essential, and experience in whole chip integration is advantageous.
職缺狀態描述
出差外派
不需出差
上班時段
日班
遠端工作
現場
上班地點
新北市
休假制度
符合勞基法
可到職日
依面談為主
招募人數
1人
股票與獎金
無
工作經歷
3-5年
學歷要求
大學或同等學歷以上
語言要求
薪資待遇補充說明
固定或變動薪資因個人資歷或績效而異
徵才公司 更多職缺
- 10人以下
- 台北市中山區吉林路309號
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