System on a Chip Architect/ Leader MemryX_美商邁瑞科技有限公司台灣分公司
職缺描述
The role
This leadership role will be responsible for the overall SOC and System Architecture efforts at MemryX. It is a highly visible role collaboratively working with our AI (MPU) architecture towards the next-gen multi-chip module with ownership of the System/Platform Architecture, SOC Uncore micro architecture, choice of IPs, detailed implementation spec, high level modeling, and KPI/PPA metric validation.
What you will be doing:
Explore, define, and implement the System and SOC architecture for the unique dataflow based near-memory MemryX's AI architecture.
Identify and implement solutions for scalable multi-chip platform enabling all DNN based edge AI requirements.
Explore, identify, and integrate uncore IPs per product requirement. Define, model, and test the integration of all features for the next-gen SOC.
Define and develop the system level integration for multi-chip end modules in various form factors. Drive customer and internal development platforms working with ODMs.
Establish best practices for development, testing, documentation and reviews.
Participate in strategic discussions for product features and roadmap.
職缺需求
What we expect to see:
BS/MS in EE/ECE with 15-20 years of experience in SOC design, VLSI and Systems
Top Education (College and GPA), and top VLSI industry experience
Hands-on experience with VLSI front end architecture, modeling, design, and validation
Experience in SOC pre and post Si, multiple TapeOuts, high performance/low power VLSI methods
Experience in system design, development, validation and deployment
Knowledge of back-end physical design, packaging, DFT, DFD
Understanding of the fundamentals of AI, specifically Deep Neural Networks
Proven leadership skills and track record in successful productization
Excellent communication and presentation skills
Self-driven with the ability to motivate and work across teams
其他條件
What we would be happy to see:
Language models, ADAS, and robotics neural network models
Application-specific accelerators understanding
Reports to: VP of Engineering
職缺狀態描述
出差外派
不需出差
上班時段
日班
遠端工作
現場
上班地點
台灣新竹縣竹北市復興一街251號/Banglaore, India
休假制度
輪班
可到職日
依面談為主
招募人數
1人
股票與獎金
無
工作經歷
10年以上
學歷要求
大學或同等學歷以上
科系要求
電子工程
薪資待遇補充說明
固定或變動薪資因個人資歷或績效而異
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